Changes between Version 1 and Version 2 of Ticket #228, comment 2
- Timestamp:
- 06/22/2021 01:03:33 PM (5 years ago)
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Ticket #228, comment 2
v1 v2 53 53 54 54 55 Machine conditions stored at that location for the fault show contents of A and Q registers,56 as well as other regs used in code just before the fault.55 Machine conditions stored at that location for the fault show contents of 56 A and Q registers, as well as other regs used in code just before the fault. 57 57 58 58 azm: mc pds$signal_data -long … … 115 115 116 116 Source shows Q being added to bb|governing_credit_bank (tc_data|451) 117 which is a positive integer after the ASQ instruction ran. But it is difficult to determine 118 its value before that addition occurred. I suspect it was a negative value. 117 which is a positive integer after the ASQ instruction ran. But it is difficult 118 to determine its value before that addition occurred. I suspect it was a 119 negative value. 119 120 120 121 azm: d pr3|451 -octal … … 123 124 451 0 122615176160 124 125 125 However, the asq instruction (which was executing when the overflow fault occurred)126 is performing signed arithmetic. Since the sign-bit is ON in the Q register,127 a large negative quantity is being added to a smaller positive value.126 However, the asq instruction (which was executing when the Overflow Fault 127 occurred) is performing signed arithmetic. Since the sign-bit is ON in the 128 Q register, a large negative quantity is being added to a smaller positive value. 128 129 The result should be a negative value. An Overflow fault is triggered because 129 130 the Overflow Mask indicator (oflm) is NOT set in the Indicators recorded
