Opened 17 months ago
Closed 12 months ago
#349 closed enhancement (fixed)
Support FPGA development by adding ability to generate MIF file to coreload.pl1
| Reported by: | Owned by: | Eric Swenson | |
|---|---|---|---|
| Priority: | minor | Milestone: | MR12.9 |
| Component: | Tools | Version: | MR12.8 |
| Keywords: | Cc: |
Description
In order to support the FPGA development of the DN6678 series front-end processor, test and diagnostic programs need to be written. Since Multics has an assembler for this platform (355MAP), it works well to assemble these programs.
The FPGA development software requires a MIF file (see https://www.intel.com/content/www/us/en/programmable/quartushelp/17.0/reference/glossary/def_mif.htm ) to be able to load these programs into simulated ROM.
The coreload.pl1 program in Multics produces a binary core image that can be loaded in a real DN6678 FNP and this same program can be modified to generate a MIF file at the same time.
A modified version of coreload.pl1 (coremif.pl1) has been provided to incorporate into a Multics release so this ability is not lost.
Change History (2)
comment:1 by , 17 months ago
| Status: | new → accepted |
|---|
comment:2 by , 12 months ago
| Milestone: | → MR12.9 |
|---|---|
| Priority: | major → minor |
| Resolution: | → fixed |
| Status: | accepted → closed |
| Version: | → MR12.8 |
https://s3.amazonaws.com/eswenson-multics/public/mcrs/MCR10151.pdf
Fixed with MR12.9-1016.