Opened 9 years ago
Last modified 6 years ago
#11 new enhancement
ISOLTS misses test opportunity
| Reported by: | anonymous | Owned by: | Eric Swenson |
|---|---|---|---|
| Priority: | major | Milestone: | |
| Component: | Documentation | Version: | |
| Keywords: | Cc: |
Description
The ISOLTS process includes instructing the operator to "depress the initialize and clear push button", but fails to verify that memory was actually cleared.
Failure of the operator is clear memory will result in incorrect test behavior, so it is reasonable for ISOLTS to verify that memory was cleared.
Failure of memory being cleared if the button was pressed would be indicative of a configuration or hardware failure, so it is reasonable that ISOLTS verify that was memory was cleared when the opportunity presents itself.
Before loading the PFT tests into the test segment, ISOLTS should check that the test segment is indeed set to all zeros, and if not, report that memory was not zero, indicating operator error, CPU malfunction or SCU malfunction.
Additionally, it should zero the memory before proceeding with the tests.

The assertion the memory is cleared may be false.
The operator instructions read:
The "initialize and clear" is pressed, all of the enable switches are "off"; this may mean that the memory is inaccessible and would not be cleared.
However, it has been observed that not clearing the memory may make ISOLTS misbehave.